# Chiseling out The Chip!

This post may be a bit redundant with the info I added in the other place, but I am excited, so I felt the need to rewrite some of it here.

Le Chip! This work took a while. To celebrate, I thought it deserves a few words in the blogs. During the past year or so, I was/have-been/will-continue-to-be working on an image sensor ADC testchip. It was finally taped out yesterday! What’s left now is some additional gastronomical work on the tapeout cake and the drainage of a rusty bottle of champagne.

The chip in all its ugly majesty with all these redundant power pads and LVDS pairs.

The core of the testchip is a fast 12-bit column-parallel ramp ADC at 5u pitch, utilizing some special counting schemes to achieve the desired 1us ramp time at slow clock rates. Alongside, to be able to fully verify the pipelined CDS functionality and crosstalk, I’ve built a pixel array in line-scan configuration, some fast LVDS drivers, clock receivers, references, state machines, a few 8-bit iDACs, bond pads, ESD, and some other array-related stuff, all from scratch! The chip has a horizontal resolution of 1024 and 128 lines with RGBW color filters and microlenses.

On the top-left corner there are some experimental silicon photomultipliers and SPAD diodes. These I plan to measure for fun and I promise to post the results in any of the two blogs.

Unfortunately, this chip wouldn’t yield tons of publicaiton work, apart from the core ADC architecture and comparator. To test the ADC one needs a whole bunch of other fast readout blocks, which in the end are not something novel, but yet, one needs them and designing these takes time. Finishing up this test system was a lot of work and I realize that it might be a bit risky and ambitious to be doing this as part of a doctorate. What if it fails to work because a state machine had an inverted signal somewhere? Or the home-made ESD and pads suffer from latch-up? Or the LVDS driver CMFB is unstable and I cannot readout data out? Or there is a current spike erasing the content of the SRAM? Or, or, or ?

We university people don’t have the corporate power to tapeout metal fixes twice a month until we’re there. I probably have another two or three chip runs for my whole doctorate. It may therefore be better (and more fun) to stick with small but esoteric modules, which one can verify separately and have time to analyze in detail. But hey, I’ll quote a colleague here: “It is what it is, let’s think how we can improve things.”

Finally, I have added this little fella who I hope will be my lucky charm.

Mr Le Duck!

With his 15um of height, could he compete in the annual “smallest duck on the planet” contest? Cheers!

# Applied chaos theory

Today I am having fun with a very nerdy circuit – Chua’s circuit. An electronic circuit that exhibits chaotic behaviour. I had a hard time getting this circuit to oscillate, but finally, after some prayers, throwing beans and doing black magic here it is:

Chua’s circuit

Heheh, looks terrible, but works. Here are some cool pictures of the Lorenz attractor. I was not able to spread the two twirls further, as my LC tank (in fact gyrator-capacitor tank) would stop oscillating.

Lorenz attractor curves tiral 1

Lorenz attractor curves tiral 2

Lorenz attractor curves tiral 3

Lorenz attractor curves tiral 4

And in case you also want to see how it sounds like and what my setup was here’s a short video clip:

# One place for science in Oslo

Greetings from Norway! I paid a visit to Lukasz and some former colleagues last weekend so I thought “Why not write a post (or a series of posts) about places for science in various cities?”. Here is where I start – the University of Oslo or to be more specific the Department of Informatics and Mathematics and to be “Swiss sharp” – the Nanoelectronics group.

The University of Oslo is one of the largest higher education institutions in Norway being the biggest in number of students in social sciences. When it comes to natural sciences it has a pretty strong competitior namely the Norwegian University of Science and Technology in Trondheim. Nevertheless, the Department of Mathematics and Informatics has a number of applied science research groups, in addition to that the pure theoretical maths and physics groups do not fade-out too much in the overall picture. The main campus (Blindern) is also merged with Oslo Science Park and dozens of applied maths/informatics private or public companies e.g. one of the major being Sintef. Besides mathematics and informatics as a “Si person” I should also mention something about the semiconductor/applied physics opportunities in that place. Unfortunately when it comes to microchips there are only a few spots in Oslo doing design, these few “spots” however on the contrary have a long history (in the context of the semiconductor industry) e.g. Texas Instruments c.a. 13 years and nowadays OmniVision (before Photobit – Micron – Aptina) about 15 years old. Some rumours about Nordic Semiconductor opening more positions in Oslo have been spreading with the speed of light recently too. Speaking of applied physics a mini-cocktail of small companies in microfluidics, optics, and nanomaterials exist, but maybe someone with broader experience should hint what actually the situation is.

Anyway, I aim to give a virtual tour of the Nanoelectronics group at IFI in UiO and provide you with some “live” pictures from my ultra-high noise, low dynamic range and shaky camera.

First stop – Department of IFI (Institutt for Informatikk) or as I often like to call it – “THE MOTHERSHIP”!

The Mothership

IFI – Department of Informatics @ UiO (typical Scandinavian weather)

This place is vacated by an extremely large number of research groups, here’s a link providing an alphabetically ordered list of all research groups at the department.

Apart from research groups, the first and second floors of this building are tailored for students offering all sorts of lecture halls and individual study rooms which one can book online. I really like the idea of giving names to rooms instead of using boring number-based systems, it seems like all Scandinavian universities I have visited so far follow this system and it is maybe something to consider by some institutions in the rest of Europe. It’s more fun to have laboratory exercises in e.g. “Olympen, Asgård, Egypten, Southfork, Muxen, Ada, Touring, Hopper, Mead, Volt, Kepler or Schrodinger” than “2.210, 4.311, 10.304, C.53 or 7.777 (:”.

a Practical Extraction and Reporting Language

After BASIC, my first ever official program used Pascal

This place is Chilly like Norway

Caml – humpy as a camel’s back ?

C – I see

Xml – eXtensible markup language? I am sure you can do better with PERL

Awk – hates PERL but both go out for dinner from time to time together with bash and tcl (;

“Master! Master! Where’s the dreams that I’ve been after?”

Limbo? Hell’s edge, or?

The baroness of all programming languages, ever!

They have even built a room dedicated to our blog, oh such an honour.

Kappa – the 10th letter of the Greek alphabet?

Photons hit electrons, but not before they’ve passed though the optics.

And the corridor & rooms goes to infinity

Ok, pretty lengthy, but the child in me screamed out so I had to take pictures of the room nameplates. Follow me to the 5th floor which is occupied by the Nanoelectronics group.

At the entrance we are greeted with some posters.

“The gods must have gone crazy” – stacked games, stacked sandwich, stacked chips 🙂

“We are the robots, we’re functioning automatic and we are dancing mechanic…”

This is what oil leads to – you guys need two more, this is not enough.

The average PhD’s heaven! Just give me coffee and a white board.

Lukasz’s messy desk – messy = work

And a poster of his master’s thesis

Chips chips chips 😉

And more chip (ship)s’

Dungeon and no dragons

The anechoic chamber!

Echoooo

Can you hear my heartbeat?

Network analyzers, but wait, what do we need them for?

Of course, to measure a random cable’s rf medium quality, handy!

Smells like electronics

Lukasz’ master thesis – the bio-inspired image sensor

And its camera control board

And a color wheel for testing purposes

Another angle (now I am really starting to suffer from comment idea deprivation)

The new testing furnace. We used the old one to bake a frozen pizza but it didn’t go very well. I wonder why? The fire-fighters were not quite happy to visit us, nor the departmental head. Dear readers, in case you want to bake a pizza in a temperature testing chamber make sure you have set the right temperature profile for your pizza indicated on its package. Alternatively you may want to try with cookies as well, what could possibly go wrong?

A microprobing station for emergency chip surgeries.

A c”s”hip. Hint, Swedes pronounce ch as sh (accent) so, if you say so – it’s a ship.

And another emergency room

Accompanied by some chip pulse and health monitors

And some other randomly scattered scalpels.

A PCB printer, I wish I had one at home some years ago

With this my shaky virtual tour ends. Unfortunately the trends point that chip design loses more and more popularity amongst students (not that it has been an extremely popular science to start with but…) as opposed to computer science, physics or mathematics. So hopefully this tour would inspire you to go forward and dive into the endless river of microelectronics.

# An analog designer’s most favorite circuit

It was about time that I start writing about circuits. I chose this one as it is the very first OTA circuit I used in practice and it is by far one’s choice consideration number one when it comes to designing an ordinary general purpose operational amplifier. It’s like the E=MC2 in physics! The architecture is so simple, yet provides an easy to design differential to single-ended conversion circuit with an increased slew rate capability.

Let’s hop-over to the beautiful architecture and derive its main parameter – the DC gain or Ao.

A current mirror OTA

However first, let’s try to identify the main sub-blocks of this circuit (divide and conquer). Transistors M1, M2 together with M3 and M4 form a simple differential amplifier, M0 acts as a current source and provides the main bias for the whole amplifier. Moving forward we can identify three current mirrors, these are M4 w/ M6, M3 w/ M5 and M7 w/ M8.

For a symmetrical design we normally want to keep the ratios (B) between M3 w/ M5 and M4 w/ M6 equal. The third current mirror formed by M7 w/ M8 would normally get a ratio of 1 if B is the same for M5 and M6, it is beneficial to set K = 1 and boost B to save some layout area. Let’s start upside down and show that the slew-rate would be simply determined by I0 and the factor B. In other words:

$SR = \frac{(I_{0}/2)B}{C_{L}}$

Good. Moving over to the DC gain, one can follow a few approaches:

1) Draw an ESSM, apply Kirchoff’s current laws and solve the corresponding system of linear equations (I’ll leave this to the academics as this is the official method and can be found in every analog design book)

2) Instead, follow your engineering intuition and find an approximate DC gain expression, which is obvious, why bother solving systems of equations, save those for difficult times.

We can assume that we have no channel length modulation effects i.e. $\lambda = 0$ or the transistor’s transconductance $g_{m}$ is much larger than the output conductance $g_{ds}$. Now the beauty, let’s split the circuit into a few primitives, think single stage amplifiers e.g. a common-source:

A common source amplifier

We know that Ao is to a first order approximation $-g_{m}R_{L}$. This is not the case for sub-micron processes, but still gives us a good enough approximation. We can also identify the other blocks – the current mirrors.

Current mirror M4 w/ M6

Current mirrors M3 w/ M5 and M7 w/ M8

These are just copying currents and effectively provide us with a ratio-amount of gain. After the current is copied, it is pushed/terminated into the output node, i.e. imagine what the “termination resistors” should be at the output node, remember the CS amp stage? The same applies for the other two mirrors (note how M7 w/ M8 form an elegant differential to single-ended conversion). So, by just bypassing the copied currents we can again remember the CS amplifier and its output load. So, intuitively the output impedance of our amplifier would be equal to $R_{outPFET}||R_{outNFET}$. We can once again go back to our CS amplifier thinking and substitute the symbols in the “engineering” way so we get:

$A_{0} = g_{m1}.B.R_{outPFET}||B.K.R_{outNFET}$

Which if we think of conductance would simply be:

$A_{0} = g_{m1}.B.\frac{1}{g_{dsPFET}}||B.K.\frac{1}{g_{dsNFET}}$

Thinking of output conductance however we can note that while changing the factor B, we increase the output current, which in another respect decreases the output impedance of our amplifier with the same magnitude, thus reducing the gain or leaving out the mirroring factor B out of the game. So, we can conclude that in general the DC gain is:

$A_{0} = g_{m1}.R_{outPFET}||R_{outNFET}$

Which is why the DC gain of this OTA architecture is relatively low and limited to what can be squeezed out of the differential pair. One common trick for increasing the DC gain at the cost of decreasing the 3dB cutoff freuqncy is by adding output cascodes:

Adding a pair of cascodes at the output stage

As shown on the picture, one can imagine those as effectively adding two more resistors in series at the output stage, well, to a primitive first order approximation. Alternatively, following your intuition, here is why adding resistors change the amplifier’s 3dB cutoff frequency and not the unity-gain frequency. Think RC low-pass filtering this time, by increasing R we increase the time constant $\tau$ thus the 3dB cutoff drops down.

Another way of “imagining” what the output cascodes does to our OTA transfer function

About the stability in feedback loops of this current mirror OTA we can in general hint that it may be a good idea to keep this amplifier dominant output load compensated and have in mind that the current mirrors M4 w/ M6 and M3 w/ M5 are contributing with a non-diminant pole (due to their gate-source and diffusion capacitances) and in cases of increased mirroring factor B lead to a significant reduction in the phase margin of the loop. A zero is also introduced at M7 w/ M8 mirroring, but in general should not be of concern due to the usually small mirroring ratio in the third mirror.

With this my simple introduction leads to an end. To be continued with “An analog designer’s second most favorite circuit” 🙂

# Signals, transistors and music

Hej hopp! Not long ago (well, technically last year) I was helping out a fellow in the lab next door with his RF LNA simulations. All of a sudden our afternoon turned into a discussion about various guitar distortion effect pedals and their circuit implementations. Today I want to show you one of the simplest possible active circuits for distorting a signal.

So what do we call distortion? Distortion is the deviation of an output signal waveform from some sort of reference signal. Said in such a way one might argue that an amplified signal is also a distortion of sorts, however when we speak about distortion we normally refer to the time-domain (wave shape bending) and not simply an amplitude scale-up.

In mathematics and engineering the sine wave is the simplest possible waveform in a sense that one can generate any other type of waveforms by adding-up multiple (infinite?) number of sine waves. In practice we can not add an infinite number of sine waves together and thus we are limited to what we can generate. Out of the scope of this topic, have a look at the Gibbs phenomenon if you want to escape the ideal world of mathematicians and are interested in practical waveform generation, yet somewhat involving maths again. In music, normally there aren’t such instruments that produce pure single sine wave tones (bar some tuning forks at e.g. 440 and 880Hz) but for the ease of explanation the rest of my writing would be using pure sine wave signals as a reference.

Back to circuits, here is the simplest possible electronic distorter circuit I can currently think of:

A half wave rectifier.

This circuit removes a part of the fundamental frequency (half wave pass-through) but introduces a more noticeable proportional octave frequencies which might often be very desirable.

Moving into an active element solution, a d-effect of most electronic amplifiers can be utilized for achieving desirable distortion. The phenomenon is often called clipping. Here is an illustration:

Sine wave clipping

To give a better overview and not waste much time I decided to hook-up a simulink model and fetch some plots. However after some frustration with this amateur tool, I decided to go back to my dear good old friend Virtuoso and hook-up a common source amplifier at a 180nm process node. Here is the common source amplifier testbench I used for my examples.

An NMOS common source amplifier.

An input-output transfer function, input bias voltage DC sweep.

First I did a DC sweep to find the suitable operating point. Have a look at the amplifier’s transfer function (right), even though that we often assume that at a certain region it is linear, we can still see that it actually isn’t (green curve), not with this 180nm CMOS process at least. I have put a fairly high impedance load of 1MOhm as to increase the gain of this circuit which is approximately equal to $A_{0} = g_{m} \times R_{L}$. So, even if it is properly (in the mid output range) biased at ~550mV and applying a 1kHz sine wave with a reasonable swing so we don’t overdrive the amplifier one can still observe some minimal distortion. On the left side the input (red) ideal sine wave and output (green) amplified sine wave can be seen. To the right is an FFT spectrum plot of the amplified (green) sine wave. You can also see some FFT spectral leakage as I was too lazy to set-up a Fourier transform with coherent sampling.

A fairly low-distortion output sine wave.

However, what happens when we overdrive the amplifier? As we have a limited by the power supply output swing the output starts to saturate and thus we start to clip the sine wave. The higher the input drive swing the higher the clipping and distortion at the ouput. One can observe on the FFT that the fundamental tone power of 1KHz is now re-distributed at a number of octaves.

A higher overdrive.

Heavy distortion, note that the second octave is about 1/3 of the fundamental tone power:

Very high overdrive, a heavy distortion

Seeing all these pictures we can conclude that the various combinations of harmonics give us all these different (some pleasurable, others not so) sound effects. Various amplifier/distorter circuits sound different and it is up to the musician/designer’s taste. Back in the old days of modern music (e.g. Pink Floyd et.al.) musicians were to some extent circuit designers/experimenters, tuning-up the perfect circuit implementation which suits their needs. In the past 20 years direct digital synthesis and signal processing has offered a number of benefits to musicians, however the discrete tunability nature of these devices provides a number of limitations when it comes to distortion effects. I was aiming to find a way to play my sine waves (this is why I initially approached simulink, as it has an audio sink function) however it is a somewhat lengthier operation and I am leaving it to your imagination.

It is fascinating to see that such a simple electronic phenomenon has dramatically added-up to the variety of music available today. I offer you an example of a very slight distortion in combination with a German flute and some digital delay and harmonization. Only 50 years ago one couldn’t even imagine such sounds. Hmm, what would music sound like by the time I reach retirement age?

# Crest factor and how is it useful?

What is a crest factor and how is it useful? Let’s start with a definition of the term. The crest factor is a measure of any type of time domain waveform giving us a ratio between the peak and average waveform values. It is very useful in a sense that it gives the person analyzing the data an overview of how much impacting occurs in a waveform. Very high drift peak values versus the average magnitude are often associated with wear and stress.

Not only it is useful in electronics where one can visualize the dynamics of a signal, but also in mechanical engineering or hydraulics. One can measure the periodicity of very high stresses, in e.g. two meshing gears or a hydraulic pump pressure fluctuation and therefore the risk of micro-cavities. Mechanical constructions coupled to very high crest factor vibrations can often cause material fatigue, all these processes can be indirectly connected to peaks in the time-domain waveform or in other words the crest factor.

Fourier transforms are used in every scientific field, signals with extremely high peak values transform into random noise on FFT diagrams which can often lead to confusion in e.g. mechanical vibration, electrical signal and other analyses. This is why a crest factor also gives us an instantaneous insight about the noise in the signals we are working with.

Now the latter statement “signals with extremely high peak values transform into random noise on FFT diagrams” can also be compared to the Delta Dirac pulse in the f-domain in a future post.